SQ40202CWUQ
- Parameters
- Features
- Description
| Part number | SQ40202CWUQ |
|---|---|
| Vin (min) (V) | 4.25 |
| Vin (max) (V) | 5.5 |
| Channel(#) | 3 Chs Buck+2 Chs LDO |
| Application | DDR5 Power Supply |
| Features | Compliant with the PMIC5100 standard of JESD301-2, SWA and SWB with programmable dual-phase/single-phase configuration, built-in multi-protection, programmable customization, current/power/temperature measurement, general status interrupt |
| Package | QFN3×4-28 |
The SQ40202C is a high efficiency low profile power management unit designed for DDR5 SODIMM as well as DDR5 UDIMM. The SQ40202C meets the PMIC5100 standard of JESD301-2. The device integrates 3 synchronous Buck converters and 2 LDOs.
SWA is a Buck regulator with a typical 1.1V output voltage in non-OC and 1.4V output voltage for OC (overclocking). The rail provides a typical 4A average current in non-OC conditions, 6A maximum average current in OC conditions. SWB is a Buck regulator with a typical 1.1V output voltage in non-OC conditions and 1.4V output voltage in OC conditions. The rail provides typical 4A average current in non-OC conditions and 6A maximum average current in OC conditions. SWA and SWB can be configured as independent or as a dual phase regulator. When used in dual phase mode, an interleaved control logic mode is used to reduce output voltage ripple. SWC is a typical 1.8V output Buck regulator. It provides 1A average and 2A maximum average current. The device features two LDOs providing output voltages of 1.8V and 1.0V respectively.
The SQ40202C includes under voltage lockout, over voltage, over current and over temperature protections to ensure reliable operation of the system.
The SQ40202C integrates an 8 bits ADC to achieve real time input voltage, output voltage, output current and temperature measurement. The host can read the measurement results through the I2C/I3C interface.
The SQ40202C is available in QFN3×4-28 package.
Evaluation Board

Photo of evaluation board

Photo of evaluation board

Photo of evaluation board

Photo of evaluation board

Photo of evaluation board

Photo of evaluation board

Photo of evaluation board

Photo of evaluation board
EVB_SQ40202CWDQ
The EVB_SQ40202CWUQ is intended for evaluating power management unit for DDR5 with 3 Buck regulator and 2 LDOs.
Technical Documentation
| Title | Date |
|---|---|
| Automotive_Solutions_Q2_2026 | 2026-06-12 |
| Silergy_Catalog_Q2_2026 | 2026-06-12 |



