• Supports 3.3V Power Supplies
• Differential Additive Phase Jitter: PCIe Gen6 <10fs RMS
• Differential Additive Phase Jitter: PCIe Gen5 <20fs RMS
• Differential Additive Phase Jitter: DB2000QL <30fs RMS
• Differential Additive Phase Jitter: PCIe Gen4 <30fs RMS
• Fully Compliant with Intel DB2000QL Specifications
• 20 Low-Power Push-Pull LP-HCSL PCIe Outputs
• Supports Clock Frequencies from 1MHz to 400MHz
• Maximum Output-to-Output Skew: 50ps
• Embedded Low Dropout (LDO) Voltage Regulator 
• Embedded Series Termination Resistors for 85Ω Differential Transmission Line
• Power Down Tolerant (PDT) On Digital Input Pins
• Transparent for Spread Spectrum Clock
• Eight OE Pins
• SMBus Interface
• Side-Band Interface (SBI)

The SQ82100 is a 20-output ultra-low additive phase jitter PCIe Gen1 to Gen6 clock buffer. The 20-channel low power differential HCSL reference output clocks can be used for SAS, SATA, and other applications. It provides integrated termination resistors for 85Ω output transmission lines. The OE_N pins, combined with SMBus enable bits and a 3-wire side-band interface, control any channel output clock, enabling or disabling it.

If SBEN is set to high, the SBI enables or disables the output. If SBEN is set to low, the data input pins (OE[512]_N, SDATA, SCLK, and PWRGD/PWRDN_N) feature a power-down tolerant design, allowing these signals to be driven when the SQ82100 is powered down.