SY70202MVTS

High Efficiency, High Integration PMIC for SSD Systems

SY70202MVTS High Efficiency, High Integration PMIC for SSD Systems Datasheet

Parameters
Features
Description

Part number	SY70202MVTS
Vin (min) (V)	2.8
Vin (max) (V)	3.7
Channel(#)	4 Chs Buck+2 Chs LDO
Application	SSD
Features	4 Chs buck and 2Chs LDO; 3.4MHz I2C; OVP/SCP/OTP; Auto PWM/PFM or Forced PWM controlled
Package	CSP2.6×2.6-36

• Wide Input Voltage Range

-- VIN = 2.8V to 3.7V

• Channel 1 Synchronous Buck:

-- 4A Maximum Output Current Capability

-- 1.6V to 3.0V Programmable, 25mV Step

-- PLSW Mode or Buck Mode Selection

• Channel 2 Synchronous Buck:

-- 2A Maximum Output Current Capability

-- 0.9V to 2.0V Programmable, 10mV Step

• Channel 3 Synchronous Buck:

-- 4A Maximum Output Current Capability

-- 0.5V to 1.2V Programmable, 10mV Step

• Channel 4 Synchronous Buck:

-- 2A Maximum Output Current Capability

-- 0.9V to 2.0V Programmable, 50mV Step

-- Buck Mode or LDO Mode Selection

• Channel 5 LDO1:

-- 0.4A Maximum Output Current Capability

-- 1.0V to 2.7V Programmable, 50mV Step

-- PLSW Mode or LDO Mode Selection

• Channel 6 LDO2:

-- 0.4A Maximum Output Current Capability

-- 1.0V to 2.7V Programmable, 50mV Step

-- PLSW Mode or LDO Mode Selection

• I2C Interface up to 3.4MHz

• Auto PWM/PFM or Forced PWM Controlled by I2C Interface

• Output Voltage Level of Each Channel Controlled by I2C Interface

• Reliable Protections:

-- Input/Output Overvoltage Protection (OVP)

-- Short-Circuit Protection (SCP)

-- Overtemperature Protection (OTP)

• Compact Package: CSP2.6×2.6-36

• MSLRating: MSL 1

The SY70202M is an SSD PMIC composed of four synchronous buck regulators and two independent LDOs. Buck 1, LDO 1, and LDO 2 operate in power load switch mode (PLSW), and Buck 4 operates in LDO mode, which can be configured using GPIOx pins.

Other configurable options include output voltage, startup time, system level sequencing, sleep mode, DPSLP mode (deep sleep), and operating mode. Each channel provides a wide voltage range to support DVS (Dynamic Voltage Scaling) through the I2C interface. The buck converters are designed to use very small inductors.

The SY70202M is available in a CSP 2.6mm×2.6mm -36 ball package.

Evaluation Board

Photo of evaluation board
Photo of evaluation board
Photo of evaluation board
Photo of evaluation board
Photo of evaluation board
Photo of evaluation board

EVB_SY70202MVTS

EVB File

The EVB_SY70202MVTS is intended for evaluating high efficiency, high integration PMIC for SSD systems.

Technical Documentation

Title	Date
Silergy_Catalog_Q2_2026	2026-06-12