SY7T625A
- Parameters
- Features
- Description
| Part number | SY7T625A |
|---|---|
| Phase | 3P |
| User MPU core | N/A |
| Flash(KB) | N/A |
| SRAM(KB) | N/A |
| Sensor Inputs (Current+Voltage) | 3V+3I |
| Accuracy (±%) | ±0.1% @ 5000:1 |
| Current sensors supported | CT, SHUNT,ROGOWSKI,SY7M007 |
| RTC | NO |
| LCD | N/A |
| GPIO | 16 |
| UART | 1 |
| Encryption | N/A |
| Package | QFN-32 |
- Isolated AFE interface supports up to four Silergy remote ADCs or up to 8 analog inputs
- Powerful 24-bit Compute Engine with 20MHz clock frequency, supported by accelerators for multiply, divide, and square root operations
- Factory-programmed or field programmable with Silergy provided firmware images
- 5x5mm 32-pin QFN package (SYT7625A), 4x4mm 24-pin QFN package (SY7T622A)
- SPI host interface, up to 10MHz, 20MHz crystal (or external clock) interface for precision timing reference
- Two pulse outputs and 10 additional digital I/O pins
The SY7T625A and SY7T622A are the host side devices of an isolated metering chipset for single-phase or poly-phase electricity metering applications. Featuring Silergy’s proprietary Teridian power measurement technology, up to four isolated analog front end (AFE) devices (SY7M007) are supported, each utilizing an independent, robust capacitively coupled digital interface. Each AFE supports two ADC channels (voltage and current) to form a highly accurate and fully isolated shunt-based meter.
In addition to the Remote System, a high-precision multiplexed ADC with up to four differential inputs, supported by a temperature-compensated reference voltage is provided.
A powerful 24-bit Compute Engine (CE) and math accelerators implement the core requirements of high accuracy metering. Code images that cover most requirements of revenue metering are provided by Silergy. These images can be pre-loaded into the flash memory of the part by ordering option, programmed at production, and can be updated in the field, if necessary. The flash memory is also used to store calibration coefficients generated during meter calibration and configuration.
Designed as a completely autonomous metrology processor, a set of pre-processed metrology outputs can be obtained by reading registers via the SPI interface. Likewise, system parameters, such as the desired meter constant (Kh), calibration coefficients, sag threshold, and other parameters can be written to RAM by the host.
A sophisticated onboard clock management system provides an internal clock source and automatically utilizes an optional external crystal if the highest accuracy timing is desired. An integrated hardware Watchdog Timer (WDT) is also included.
The example schematic illustrates an application of four SY7M007 isolated AFEs connected to voltage and current sensors for each phase. Scaled voltages from the sensors are digitized, and the data stream of measurement data is coupled to the SY7T625A with discrete or PCB capacitors.
The SY7T625A replaces the SY7T625. It is pin-compatible and to a high degree function-compatible with the SY7T625. Code images for the SY7T625A and SY7T622A are available from Silergy. The SY7T622A is the same part as the SY7T625A with reduced pin count.
Technical Documentation
| Title | Date |
|---|---|
| Automotive_Solutions_Q1_2026 | 2026-03-06 |
| Silergy_Catalog_Q1_2026 | 2026-02-09 |



